TY - JOUR AU - Esteves, Linton T. C. AU - Simas Filho, Eduardo F. AU - Farias, Paulo C. M. A. AU - Andrade Filho, Luciano M. AU - Cerqueira, Augusto S. AU - Ferraz, Victor A. AU - Gama, Rafael G. AU - Seixas, José M. PY - 2018/05/04 Y2 - 2024/03/28 TI - Embedded Signal Processing Module for Online Filtering in High-Event Rate Conditions JF - Journal of Communication and Information Systems JA - Journal of Communication and Information Systems VL - 33 IS - 1 SE - Regular Papers DO - 10.14209/jcis.2018.7 UR - https://jcis.sbrt.org.br/jcis/article/view/542 SP - AB - <pre style="-qt-block-indent: 0; text-indent: 0px; margin: 0px;"> </pre><pre style="-qt-block-indent: 0; text-indent: 0px; margin: 0px;"><span style="text-decoration: underline; color: #000000;">Online</span><span style="color: #000000;"> event detection (filtering) is required in communications, industry and electronic instrumentation systems. Those systems may comprise sequential decision levels. Eventually, decision to reject or accept an event may comprise fusion of different measured data. This work describes an embedded solution in field-programmable gate array (</span><span style="text-decoration: underline; color: #000000;">FPGA</span><span style="color: #000000;">), which allows to combine information from two different sources for a decision. A matched filter discriminator was used to identify typical signatures of interest. The main focus is on both digital data control and packaging module design and implementation and optimization of the matched filter module in terms of </span><span style="text-decoration: underline; color: #000000;">FPGA</span><span style="color: #000000;"> occupation. The proposed digital electronic system is presented and simulation results are used to validate the design.</span></pre><pre style="-qt-block-indent: 0; text-indent: 0px; margin: 0px;"><span style="color: #000000;"><br style="text-decoration: underline; color: #000000;" /></span></pre> ER -