Síntese de Alto Nível de Protocolos de Comunicação Especificados na Linguagem Formal Estelle Usando o Ambiente Amical<br />DOI: 10.14209/jcis.1997.7
Abstract
This paper presents a methodology to efficiently translate Estelle protocols specifications into VHDL descriptions. The proposed methodology allows to generate protocol descriptions suitable for High Level Synthesis (HLS). The goal is to develop description styles for state machines in VHDL that minimizes the number of paths in the scheduling algorithms, during the HLS. As a result, the area of the synthesized circuits is optimized. An example using a specific HLS environment was developed in order to verify the efficiency of the proposed methodology.Downloads
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Published
2015-06-17
How to Cite
Pirmez, L., Pedroza, A., & Mesquita, A. (2015). Síntese de Alto Nível de Protocolos de Comunicação Especificados na Linguagem Formal Estelle Usando o Ambiente Amical<br />DOI: 10.14209/jcis.1997.7. Journal of Communication and Information Systems, 12(1). Retrieved from https://jcis.sbrt.org.br/jcis/article/view/219
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Regular Papers
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Received 2015-06-17
Accepted 2015-06-17
Published 2015-06-17
Accepted 2015-06-17
Published 2015-06-17